X87
x87 is a floating-point-related subset of the x86 architecture instruction set. It originated as an extension of the 8086 instruction set in the form of optional floating-point coprocessors that worked in tandem with corresponding x86 CPUs. These microchips had names ending in "87". This was also known as the NPX. Like other extensions to the basic instruction set, x87 instructions are not strictly needed to construct working programs, but provide hardware and microcode implementations of common numerical tasks, allowing these tasks to be performed much faster than corresponding machine code routines can. The x87 instruction set includes instructions for basic floating-point operations such as addition, subtraction and comparison, but also for more complex numerical operations, such as the computation of the tangent function and its inverse, for example.
Most x86 processors since the Intel 80486 have had these x87 instructions implemented in the main CPU, but the term is sometimes still used to refer to that part of the instruction set. Before x87 instructions were standard in PCs, compilers or programmers had to use rather slow library calls to perform floating-point operations, a method that is still common in embedded systems.
Description
The x87 registers form an 8-level deep non-strict stack structure ranging from ST to ST with registers that can be directly accessed by either operand, using an offset relative to the top, as well as pushed and popped.There are instructions to push, calculate, and pop values on top of this stack; unary operations then implicitly address the topmost ST, while binary operations implicitly address ST and ST. The non-strict stack model also allows binary operations to use ST together with a direct memory operand or with an explicitly specified stack register, ST, in a role similar to a traditional accumulator. This can also be reversed on an instruction-by-instruction basis with ST as the unmodified operand and ST as the destination. Furthermore, the contents in ST can be exchanged with another stack register using an instruction called FXCH ST.
These properties make the x87 stack usable as seven freely addressable registers plus a dedicated accumulator. This is especially applicable on superscalar x86 processors, where these exchange instructions are optimized down to a zero clock penalty by using one of the integer paths for FXCH ST in parallel with the FPU instruction. Despite being natural and convenient for human assembly language programmers, some compiler writers have found it complicated to construct automatic code generators that schedule x87 code effectively. Such a stack-based interface potentially can minimize the need to save scratch variables in function calls compared with a register-based interface
The x87 provides single-precision, double-precision and 80-bit double-extended precision binary floating-point arithmetic as per the IEEE 754-1985 standard. By default, the x87 processors all use 80-bit double-extended precision internally. A given sequence of arithmetic operations may thus behave slightly differently compared to a strict single-precision or double-precision IEEE 754 FPU. As this may sometimes be problematic for some semi-numerical calculations written to assume double precision for correct operation, to avoid such problems, the x87 can be configured using a special configuration/status register to automatically round to single or double precision after each operation. Since the introduction of SSE2, the x87 instructions are not as essential as they once were, but remain important as a high-precision scalar unit for numerical calculations sensitive to round-off error and requiring the 64-bit mantissa precision and extended range available in the 80-bit format.
Performance
Clock cycle counts for examples of typical x87 FPU instructions.The A...B notation covers timing variations dependent on transient pipeline status and the arithmetic precision chosen ; it also includes variations due to numerical cases. The L → H notation depicts values corresponding to the lowest and the highest maximal clock frequencies that were available.
| x87 implementation | FADD | FMUL | FDIV | FXCH | FCOM | FSQRT | FPTAN | FPATAN | Max clock | Peak FMUL | FMUL§ rel. 5 MHz 8087 |
| 8087 | 70…100 | 90…145 | 193…203 | 10…15 | 40…50 | 180…186 | 30…540 | 250…800 | 5 → 10 | 0.034…0.055 → 0.100…0.111 | 1 → 2× as fast |
| 80287 | 70…100 | 90…145 | 193…203 | 10…15 | 40…50 | 180…186 | 30…540 | 250…800 | 6 → 12 | 0.041…0.066 → 0.083…0.133 | 1.2 → 2.4× |
| 80387 | 23…34 | 29…57 | 88…91 | 18 | 24 | 122…129 | 191…497 | 314…487 | 16 → 33 | 0.280…0.552 → 0.580…1.1 | ~10 → 20× |
| 80486 | 8…20 | 16 | 73 | 4 | 4 | 83…87 | 200…273 | 218…303 | 16 → 50 | 1.0 → 3.1 | ~18 → 56× |
| Cyrix 6x86, Cyrix MII | 4…7 | 4…6 | 24…34 | 2 | 4 | 59…60 | 117…129 | 97…161 | 66 → 300 | 11…16 → 50…75 | ~320 → 1400× |
| AMD K6 | 2 | 2 | 21…41 | 2 | 3 | 21…41 | ? | ? | 166 → 550 | 83 → 275 | ~1500 → 5000× |
| Pentium / Pentium MMX | 1…3 | 1…3 | 39 | 1 | 1…4 | 70 | 17…173 | 19…134 | 60 → 300 | 20…60 → 100…300 | ~1100 → 5400× |
| Pentium Pro | 1…3 | 2…5 | 16…56 | 1 | 1 | 28…68 | ? | ? | 150 → 200 | 30…75 → 40…100 | ~1400 → 1800× |
| Pentium II / III | 1…3 | 2…5 | 17…38 | 1 | 1 | 27…50 | ? | ? | 233 → 1400 | 47…116 → 280…700 | ~2100 → 13000× |
| Athlon | 1…4 | 1…4 | 13…24 | 1 | 1…2 | 16…35 | ? | ? | 500 → 2330 | 125…500 → 580…2330 | ~9000 → 42000× |
| Athlon 64 | 1000 → 3200 | 250…1000 → 800…3200 | ~18000 → 58000× | 1 | - | - | - | - | - | - | - |
| Pentium 4 | 1…5 | 2…7 | 20…43 | multiple cycles | 1 | 20…43 | ? | ? | 1300 → 3800 | 186…650 → 543…1900 | ~11000 → 34000× |
Manufacturers
Companies that have designed or manufactured floating-point units compatible with the Intel 8087 or later models include AMD, Chips and Technologies, Cyrix, Fujitsu, Harris Semiconductor, IBM, IDT, IIT, LC Technology, National Semiconductor, NexGen, Rise Technology, ST Microelectronics, Texas Instruments, Transmeta, ULSI, VIA, and Xtend.Architectural generations
8087
The 8087 was the first math coprocessor for 16-bit processors designed by Intel. It was built to be paired with the Intel 8088 or 8086 microprocessors.80187
The 80187 is the math coprocessor for the Intel 80186 CPU. It is incapable of operating with the 80188, as the 80188 has an 8-bit data bus; the 80188 can only use the 8087. The 80187 did not appear at the same time as the 80186 and 80188, but was in fact launched after the 80287 and the 80387. Although the interface to the main processor is the same as that of the 8087, its core is that of the 80387 and is thus fully IEEE 754-compliant and capable of executing all the 80387's extra instructions.80287
The 80287 is the math coprocessor for the Intel 80286 series of microprocessors. Intel's models included variants with specified upper frequency limits ranging from 6 up to 12 MHz. Later followed the i80287XL with 387 microarchitecture and the i80287XLT, a special version intended for laptops, as well as other variants.The 80287XL is actually an 80387SX with a 287 pinout. It contains an internal 3/2 multiplier so that motherboards that ran the coprocessor at 2/3 CPU speed could instead run the FPU at the same speed of the CPU. Other 287 models with 387-like performance are the Intel 80C287, built using CHMOS III, and the AMD 80EC287 manufactured in AMD's CMOS process, using only fully static gates.
The 80287 and 80287XL work with the 80386 microprocessor and were initially the only coprocessors available for the 80386 until the introduction of the 80387 in 1987. Finally, they were able to work with the Cyrix Cx486SLC. However, for both of these chips the 80387 is strongly preferred for its higher performance and the greater capability of its instruction set.
80387
The 80387 is the first Intel coprocessor to be fully compliant with the IEEE 754-1985 standard. Released in 1987, a full two years after the 386 chip, the i387 includes much improved speed over Intel's previous 8087/80287 coprocessors and improved characteristics of its trigonometric functions. The 8087 and 80287's FPTAN and FPATAN instructions are limited to an argument in the range ±π/4, and the 8087 and 80287 have no direct instructions for the SIN and COS functions.Without a coprocessor, the 386 normally performs floating-point arithmetic through software routines, implemented at runtime through a software exception handler. When a math coprocessor is paired with the 386, the coprocessor performs the floating-point arithmetic in hardware, returning results much faster than an software library call.
The i387 is compatible only with the standard i386 chip, which has a 32-bit processor bus. The later cost-reduced i386SX, which has a narrower 16-bit data bus, can not interface with the i387's 32-bit bus. The i386SX requires its own coprocessor, the 80387SX, which is compatible with the SX's narrower 16-bit data bus.