VIA PadLock


VIA PadLock is a CPU instruction set found on processors produced by VIA Technologies and Zhaoxin. Introduced in 2003 with the "Centaur" CPUs, this instruction set provides hardware-accelerated random number generation, AES crypto, SHA1, SHA256, and Montgomery modular multiplication.

Instructions

The PadLock instruction set can be divided into four subsets:
The padlock capability is indicated via a CPUID instruction with EAX = 0xC0000000. If the resultant EAX >= 0xC0000001, the CPU is aware of Centaur features. An additional request with EAX = 0xC0000001 then returns PadLock support in EDX. The padlock capability can be toggled on or off with MSR 0X1107.
VIA PadLock found on some Zhaoxin CPUs have SM3 hashing and SM4 block cipher added.

CPUs with PadLock