Reliability (semiconductor)


Reliability of semiconductor devices can be summarized as follows:
  1. Semiconductor devices are very sensitive to impurities and particles. Therefore, to manufacture these devices it is necessary to manage many processes while accurately controlling the level of impurities and particles. The finished product quality depends upon the many layered relationship of each interacting substance in the semiconductor, including metallization, chip material and package.
  2. The problems of micro-processes, and thin films and must be fully understood as they apply to metallization and wire bonding. It is also necessary to analyze surface phenomena from the aspect of thin films.
  3. Due to the rapid advances in technology, many new devices are developed using new materials and processes, and design calendar time is limited due to non-recurring engineering constraints, plus time to market concerns. Consequently, it is not possible to base new designs on the reliability of existing devices.
  4. To achieve economy of scale, semiconductor products are manufactured in high volume. Furthermore, repair of finished semiconductor products is impractical. Therefore, incorporation of reliability at the design stage and reduction of variation in the production stage have become essential.
  5. Reliability of semiconductor devices may depend on assembly, use, and environmental conditions. Stress factors affecting device reliability include gas, dust, contamination, voltage, current density, temperature, humidity, mechanical stress, vibration, shock, radiation, pressure, and intensity of magnetic and electrical fields.
Design factors affecting semiconductor reliability include: voltage, power, and current derating; metastability; logic timing margins ; timing analysis; temperature derating; and process control.

Methods of improvement

Reliability of semiconductors is kept high through several methods. Cleanrooms control impurities,
process control controls processing, and burn-in and probe and test reduce escapes. Probe tests the semiconductor die, prior to packaging, via micro-probes connected to test equipment. Final test tests the packaged device, often pre-, and post burn-in for a set of parameters that assure operation. Process and design weaknesses are identified by applying a set of stress tests in the qualification phase of the semiconductors before their market introduction e. g. according to the AEC Q100 and Q101 stress qualifications. Parts Average Testing is a statistical method for recognizing and quarantining semiconductor die that have a higher probability of reliability failures. This technique identifies characteristics that are within specification but outside of a normal distribution for that population as at-risk outliers not suitable for high reliability applications. Tester-based Parts Average Testing varieties include Parametric Parts Average Testing and Geographical Parts Average Testing, among others. Inline Parts Average Testing uses data from production process control inspection and metrology to perform the outlier recognition function.
Bond strength measurement is performed in two basic types: pull testing and shear testing. Both can be done destructively, which is more common, or non destructively. Non destructive tests are normally used when extreme reliability is required such as in military or aerospace applications.

Failure mechanisms

Failure mechanisms of electronic semiconductor devices fall in the following categories
  1. Material-interaction-induced mechanisms.
  2. Stress-induced mechanisms.
  3. Mechanically induced failure mechanisms.
  4. Environmentally induced failure mechanisms.

    Material-interaction-induced mechanisms

  5. Field-effect transistor gate-metal sinking
  6. Ohmic contact degradation
  7. Channel degradation
  8. Surface-state effects
  9. Package molding contamination—impurities in packaging compounds cause electrical failure

    Stress-induced failure mechanisms

  10. Electromigration - electrically induced movement of the materials in the chip
  11. Burnout - localized overstress
  12. Hot Electron Trapping - due to overdrive in power RF circuits
  13. Electrical Stress - Electrostatic discharge, High Electro-Magnetic Fields, Latch-up overvoltage, overcurrent

    Mechanically induced failure mechanisms

  14. Die fracture - due to mis-match of thermal expansion coefficients
  15. Die-attach voids - manufacturing defect—screenable with Scanning Acoustic Microscopy.
  16. Solder joint failure by creep fatigue or intermetallics cracks.
  17. Die-pad/molding compound delamination due to thermal cycling

    Environmentally induced failure mechanisms

  18. Humidity effects - moisture absorption by the package and circuit
  19. Hydrogen effects - Hydrogen induced breakdown of portions of the circuit
  20. Other Temperature Effects—Accelerated Aging, Increased Electro-migration with temperature, Increased Burn-Out