Register machine


In mathematical logic and theoretical computer science a register machine is a generic class of abstract machines used in a manner similar to a Turing machine. All the models are Turing equivalent.

Overview

The register machine gets its name from its use of one or more "registers". In contrast to the tape and head used by a Turing machine, the model uses multiple, uniquely addressed registers, each of which holds a single positive integer.
There are at least four sub-classes found in literature, here listed from most primitive to the most like a computer:
Any properly defined register machine model is Turing equivalent. Computational speed is very dependent on the model specifics.
In practical computer science, a similar concept known as a virtual machine is sometimes used to minimise dependencies on underlying machine architectures. Such machines are also used for teaching. The term "register machine" is sometimes used to refer to a virtual machine in textbooks.

Formal definition

A register machine consists of:
  1. An unbounded number of labeled, discrete, unbounded registers unbounded in extent : a finite set of registers each considered to be of infinite extent and each of which holds a single non-negative integer. The registers may do their own arithmetic, or there may be one or more special registers that do the arithmetic e.g. an "accumulator" and/or "address register". See also Random-access machine.
  2. Tally counters or marks: discrete, indistinguishable objects or marks of only one sort suitable for the model. In the most-reduced counter machine model, per each arithmetic operation only one object/mark is either added to or removed from its location/tape. In some counter machine models, Minsky ) and most RAM and RASP models more than one object/mark can be added or removed in one operation with "addition" and usually "subtraction"; sometimes with "multiplication" and/or "division". Some models have control operations such as "copy" that move "clumps" of objects/marks from register to register in one action.
  3. A limited set of instructions: the instructions tend to divide into two classes: arithmetic and control. The instructions are drawn from the two classes to form "instruction-sets", such that an instruction set must allow the model to be Turing equivalent.
  4. #Arithmetic: arithmetic instructions may operate on all registers or on just a special register. They are usually chosen from the following sets :
  5. #*Counter machine:
  6. #*Reduced RAM, RASP:
  7. #*Augmented RAM, RASP: All of the reduced instructions plus:
  8. #Control:
  9. #*Counter machine models: optional
  10. #*RAM and RASP models: most have, or
  11. #*All models: at least one conditional "jump" following test of a register e.g.
  12. #*All models optional:
  13. #Register-addressing method:
  14. #*Counter machine: no indirect addressing, immediate operands possible in highly atomized models
  15. #*RAM and RASP: indirect addressing available, immediate operands typical
  16. #Input-output: optional in all models
  17. State register: A special Instruction Register "IR", finite and separate from the registers above, stores the current instruction to be executed and its address in the TABLE of instructions; this register and its TABLE is located in the finite state machine.
  18. *The IR is off-limits to all models. In the case of the RAM and RASP, for purposes of determining the "address" of a register, the model can select either in the case of direct addressing—the address specified by the TABLE and temporarily located in the IR or in the case of indirect addressing—the contents of the register specified by the IR's instruction.
  19. *The IR is not the "program counter" of the RASP. The PC is just another register similar to an accumulator, but dedicated to holding the number of the RASP's current register-based instruction. Thus a RASP has two "instruction/program" registers— the IR, and a PC for the program located in the registers.
  20. List of labeled instructions, usually in sequential order: A finite list of instructions. In the case of the counter machine, random-access machine and pointer machine the instruction store is in the "TABLE" of the finite state machine; thus these models are example of the Harvard architecture. In the case of the RASP the program store is in the registers; thus this is an example of the von Neumann architecture. See also Random-access machine and Random-access stored-program machine.
Usually, like computer programs, the instructions are listed in sequential order; unless a jump is successful the default sequence continues in numerical order. An exception to this is the abacus, Minsky ) counter machine models—every instruction has at least one "next" instruction identifier "z", and the conditional branch has two.
  1. *Observe also that the abacus model combines two instructions, JZ then DEC: e.g..
See McCarthy Formalism for more about the conditional expression "IF r=0 THEN ztrue ELSE zfalse".

Historical development of the register machine model

Two trends appeared in the early 1950s—the first to characterize the computer as a Turing machine, the second to define computer-like models—models with sequential instruction sequences and conditional jumps—with the power of a Turing machine, i.e. a so-called Turing equivalence. Need for this work was carried out in context of two "hard" problems: the unsolvable word problem posed by Emil Post—his problem of "tag"—and the very "hard" problem of Hilbert's problems—the 10th question around Diophantine equations. Researchers were questing for Turing-equivalent models that were less "logical" in nature and more "arithmetic" p. 281, Shepherdson–Sturgis.
The first trend—toward characterizing computers—seems to have originated with Hans Hermes, Rózsa Péter, and Heinz Kaphengst, the second trend with Hao Wang and, as noted above, furthered along by Zdzislaw Alexander Melzak, Joachim Lambek, Marvin Minsky, and John Shepherdson and Howard E. Sturgis.
The last five names are listed explicitly in that order by Yuri Matiyasevich. He follows up with:
It appears that Lambek, Melzak, Minsky and Shepherdson and Sturgis independently anticipated the same idea at the same time. See Note On Precedence below.
The history begins with Wang's model.

(1954, 1957) Wang's model: Post–Turing machine

Wang's work followed from Emil Post's paper and led Wang to his definition of his Wang B-machine—a two-symbol Post–Turing machine computation model with only four atomic instructions:
To these four both Wang and then C.Y. Lee added another instruction from the Post set, and then a Post's unconditional jump between the theory of Turing machines and the practical world of the computer.
Wang's work was highly influential. We find him referenced by Minsky and, Melzak, Shepherdson and Sturgis. Indeed, Shepherdson and Sturgis remark that:
Martin Davis eventually evolved this model into the Post–Turing machine.
Difficulties with the Wang/Post–Turing model:
Except there was a problem: the Wang model was still a single-tape Turing-like device, however nice its sequential program instruction-flow might be. Both Melzak and Shepherdson and Sturgis observed this :
Indeed, as examples at Turing machine examples, Post–Turing machine and partial function show, the work can be "complicated".

Minsky, Melzak-Lambek and Shepherdson–Sturgis models "cut the tape" into many

So why not 'cut the tape' so each is infinitely long but left-ended, and call these three tapes "Post–Turing tapes"? The individual heads will move left and right. In one sense the heads indicate "the tops of the stack" of concatenated marks. Or in Minsky and Hopcroft and Ullman the tape is always blank except for a mark at the left end—at no time does a head ever print or erase.
We just have to be careful to write our instructions so that a test-for-zero and jump occurs before we decrement otherwise our machine will "fall off the end" or "bump against the end"—we will have an instance of a partial function. Before a decrement our machine must always ask the question: "Is the tape/counter empty? If so then I can't decrement, otherwise I can."
Minsky and Shepherdson–Sturgis prove that only a few tapes—as few as one—still allow the machine to be Turing equivalent IF the data on the tape is represented as a Gödel number ; this number will evolve as the computation proceeds. In the one tape version with Gödel number encoding the counter machine must be able to multiply the Gödel number by a constant, and divide by a constant and jump if the remainder is zero. Minsky shows that the need for this bizarre instruction set can be relaxed to and the convenience instructions if two tapes are available. A simple Gödelization is still required, however. A similar result appears in Elgot–Robinson with respect to their RASP model.

(1961) Melzak's model is different: clumps of pebbles go into and out of holes

Melzak's model is significantly different. He took his own model, flipped the tapes vertically, called them "holes in the ground" to be filled with "pebble counters". Unlike Minsky's "increment" and "decrement", Melzak allowed for proper subtraction of any count of pebbles and "adds" of any count of pebbles.
He defines indirect addressing for his model and provides two examples of its use ; his "proof" that his model is Turing equivalent is so sketchy that the reader cannot tell whether or not he intended the indirect addressing to be a requirement for the proof.
Legacy of Melzak's model is Lambek's simplification and the reappearance of his mnemonic conventions in Cook and Reckhow 1973.

Lambek (1961) atomizes Melzak's model into the Minsky (1961) model: INC and DEC-with-test

Lambek took Melzak's ternary model and atomized it down to the two unary instructions—X+, X- if possible else jump—exactly the same two that Minsky had come up with.
However, like the Minsky model, the Lambek model does execute its instructions in a default-sequential manner—both X+ and X- carry the identifier of the next instruction, and X- also carries the jump-to instruction if the zero-test is successful.

Elgot–Robinson (1964) and the problem of the RASP without indirect addressing

A RASP or random-access stored-program machine begins as a counter machine with its "program of instruction" placed in its "registers". Analogous to, but independent of, the finite state machine's "Instruction Register", at least one of the registers and one or more "temporary" registers maintain a record of, and operate on, the current instruction's number. The finite state machine's TABLE of instructions is responsible for fetching the current program instruction from the proper register, parsing the program instruction, fetching operands specified by the program instruction, and executing the program instruction.
Except there is a problem: If based on the counter machine chassis this computer-like, von Neumann machine will not be Turing equivalent. It cannot compute everything that is computable. Intrinsically the model is bounded by the size of its finite state machine's instructions. The counter machine based RASP can compute any primitive recursive function but not all mu recursive functions.
Elgot–Robinson investigate the possibility of allowing their RASP model to "self modify" its program instructions. The idea was an old one, proposed by Burks-Goldstine-von Neumann, and sometimes called "the computed goto." Melzak specifically mentions the "computed goto" by name but instead provides his model with indirect addressing.
Computed goto: A RASP program of instructions that modifies the "goto address" in a conditional- or unconditional-jump program instruction.
But this does not solve the problem. What is necessary is a method to fetch the address of a program instruction that lies "beyond/above" the upper bound of the finite state machine's instruction register and TABLE.
Minsky hints at the issue in his investigation of a counter machine equipped with the instructions. He doesn't tell us how to fix the problem, but he does observe that:
But Elgot and Robinson solve the problem: They augment their P0 RASP with an indexed set of instructions—a somewhat more complicated form of indirect addressing. Their P'0 model addresses the registers by adding the contents of the "base" register to the "index" specified explicitly in the instruction. Thus the indexing P'0 instructions have one more parameter than the non-indexing P0 instructions:

Hartmanis (1971)

By 1971 Hartmanis has simplified the indexing to indirection for use in his RASP model.
Indirect addressing: A pointer-register supplies the finite state machine with the address of the target register required for the instruction. Said another way: The contents of the pointer-register is the address of the "target" register to be used by the instruction. If the pointer-register is unbounded, the RAM, and a suitable RASP built on its chassis, will be Turing equivalent. The target register can serve either as a source or destination register, as specified by the instruction.
Note that the finite state machine does not have to explicitly specify this target register's address. It just says to the rest of the machine: Get me the contents of the register pointed to by my pointer-register and then do xyz with it. It must specify explicitly by name, via its instruction, this pointer-register but it doesn't have to know what number the pointer-register actually contains.

Cook and Reckhow (1973) describe the RAM

Cook and Reckhow cite Hartmanis and simplify his model to what they call a random-access machine. In a sense we are back to Melzak but with a much simpler model than Melzak's.

Precedence

Minsky was working at the MIT Lincoln Laboratory and published his work there; his paper was received for publishing in the Annals of Mathematics on August 15, 1960 but not published until November 1961. While receipt occurred a full year before the work of Melzak and Lambek was received and published. That both were Canadians and published in the Canadian Mathematical Bulletin, neither would have had reference to Minsky's work because it was not yet published in a peer-reviewed journal, but Melzak references Wang, and Lambek references Melzak, leads one to hypothesize that their work occurred simultaneously and independently.
Almost exactly the same thing happened to Shepherdson and Sturgis. Their paper was received in December 1961—just a few months after Melzak and Lambek's work was received. Again, they had little or no benefit of reviewing the work of Minsky. They were careful to observe in footnotes that papers by Ershov, Kaphengst and Peter had "recently appeared". These were published much earlier but appeared in the German language in German journals so issues of accessibility present themselves.
The final paper of Shepherdson and Sturgis did not appear in a peer-reviewed journal until 1963. And as they fairly and honestly note in their Appendix A, the 'systems' of Kaphengst, Ershov, Peter are all so similar to what results were obtained later as to be indistinguishable to a set of the following:
Indeed, Shepherson and Sturgis conclude
By order of publishing date the work of Kaphengst, Ershov, Peter were first.