LISA (Language for Instruction Set Architecture)


LISA is a language to describe the instruction set architecture of a processor. LISA captures the information required to generate software tools and implementation hardware of a given processor.
LISA has been used to re-implement the hardware of existing processor cores, keeping the binary compatibility with the legacy version, as all software tools did already exist and legacy compiled software images could be executed on the newly created hardware. Another application has been to generate the ISS for RISC processors such the ARM architecture ISSes.
LISA is not focused on the modeling of other on-chip components around the processor core itself, such as peripherals, hardware accelerators, buses and memories; Other languages such as SystemC can be used for these.
The language has not been yet standardised by IEEE or ISO and is currently owned by RWTH Aachen University, in Germany.

Features

History

LISA was initially developed at Institute for Integrated Signal Processing Systems Aachen, belonging to RWTH Aachen University, in Germany. The current official version from RWTH Aachen is LISA 2.0. The language is still in evolution to cover research on processors, including Reconfigurable computing, multi-core, parallel programming.
One noticeable branch called LISA+ has been created for handling the modeling of peripherals such as interrupt controllers, timers, etc.

Papers