Handel-C is a high-level programming language which targets low-level hardware, most commonly used in the programming of FPGAs. It is a rich subset of C, with non-standard extensions to control hardware instantiation with an emphasis on parallelism. Handel-C is to hardware design what the first high-level programming languages were to programming CPUs. Unlike many other design languages that target a specific architecture Handel-C can be compiled to a number of design languages and then synthesised to the corresponding hardware. This frees developers to concentrate on the programming task at hand rather than the idiosyncrasies of a specific design language and architecture.
In order to facilitate a way to describe parallel behavior some of the CSP keywords are used, along with the general file structure of Occam. For example: par
Channels
provide a mechanism for message passing between parallel threads. Channels can be defined as asynchronous or synchronous. A thread writing to a synchronous channel will be immediately blocked until the corresponding listening thread is ready to receive the message. Likewise the receiving thread will block on a read statement until the sending thread executes the next send. Thus they may be used as a means of synchronizing threads. par
Asynchronous channels provide a specified amount of storage for data passing through them in the form of a FIFO. Whilst this FIFO neither full nor empty, both sending and receiving threads may proceed without being blocked. However, when the FIFO is empty, the receiving thread will block at the next read. When it is full, the sending thread will block at the next send. A channel with actors in differing clock domains is automatically asynchronous due to the need for at least one element of storage to mitigate metastability. A thread may simultaneously wait on multiple channels, synchronous or asynchronous, acting upon the first one available given a specified order of priority or optionally executing an alternate path if none is ready.
Scope and variable sharing
The scope of declarations are limited to the code blocks in which they were declared, the scope is hierarchical in nature as declarations are in scope within sub blocks. For example: int a; void main
In addition to the effects the standard semantics of C have on the timing of the program, the following keywords are reserved for describing the practicalities of the FPGA environment or for the language elements sourced from Occam:
Types and Objects
Expressions
Statements
chan
<... >
!
chanin
?
chanout
\\
delay
macro expr
<-
ifselect
external
@
set intwidth
external_divide
select
let... ; in
inline
width
par
interface
prialt
internal
releasesema
internal_divide
set clock
mpram
set family
macro proc
set part
ram
set reset
rom
seq
sema
try reset
shared
trysema
signal
with
typeof
undefined
wom
Scheduling
In Handel-C, assignment and the delay command take one cycle. All other operations are "free". This allows programmers to manually schedule tasks and create effective pipelines. By arranging loops in parallel with the correct delays, pipelines can massively increase data throughput, at the expense of increased hardware resource use.
History
The historical roots of Handel-C are in a series of Oxford University Computing Laboratoryhardware description languages developed by the hardware compilation group. Handel HDL evolved into Handel-C around early 1996. The technology developed at Oxford was spun off to mature as a cornerstone product for Embedded Solutions Limited in 1996. ESL was renamed Celoxica in September 2000. Handel-C was adopted by many University Hardware Research groups after its release by ESL, as a result was able to establish itself as a hardware design tool of choice within the academic community, especially in the United Kingdom. In early 2008, Celoxica's ESL business was acquired by Agility, which developed and sold, among other products, ESL tools supporting Handel-C. In early 2009, Agility ceased operations after failing to obtain further capital investments or credit In January 2009, Mentor Graphics acquired Agility's C synthesis assets. Other subset C HDL's that developed around the same time are Transmogrifier C in 1994 at University of Toronto and Streams-C at Los Alamos National Laboratory
